Whether it is a standard through-hole for component leads or a via connecting inner layers to outer layers, all electrical conduction between circuit board layers relies on the drilling and copper plating processes. Drilling creates the physical holes in the laminate, while copper plating deposits a conductive copper layer on the hole walls, allowing traces on different layers to be electrically connected. Drilling and copper plating are among the processes with the highest defect rates in PCB manufacturing. Thin hole-wall copper, rough hole walls, drill wander, and hole-wall voids are all common batch-level defects.
1. CNC Drilling: Precisely Forming Through-Holes in the Circuit Board
After lamination, the full panel first moves to the CNC drilling stage. Following the drill file, the factory uses tiny drills rotating at high speed to produce vias, component holes, and tooling holes at the specified coordinates.
PCB drill bits are extremely hard but very small in diameter, making them highly prone to breakage. During drilling, spindle speed, drill depth, and feed rate are all governed by strict parameters. As the bit cuts through the laminate at high speed, a large amount of heat is generated, and the resulting high temperature can easily melt the resin substrate and cause it to smear onto the hole walls.
To reduce drill wear, not all holes on a board are drilled in a single pass. The drilling machine processes holes in batches by diameter, drilling small holes first and larger holes afterward. Once drilling is complete, burrs are left on the panel surface, requiring a deburring/edge-finishing step to remove copper debris and burrs from the top and bottom surfaces of the laminate.
The precision of the drilling process directly determines whether the hole positions align with the inner-layer annular rings. If the drill wanders off position, the via may break away from the inner-layer copper ring, resulting in an open-circuit defect.
2. Desmear: Removing Melted Residue from the Hole Walls
When the drill bit cuts through the board resin at high speed, the instantaneous high temperature melts the resin on the hole-wall surface. After cooling, a thin layer of smear residue is left on the inner hole wall. This smear is an insulating material; if it remains on the hole wall, subsequent copper plating cannot adhere to the substrate surface, causing the hole copper to disconnect from the inner-layer copper foil and resulting in intermittent opens.
Desmear uses a strong oxidizing chemical solution to etch away and clean the residual smear on the hole walls. The industry-standard approach is the potassium permanganate desmear process. Bath temperature and immersion time must be precisely controlled. Insufficient desmear leaves smear residue; excessive desmear removes too much resin substrate, creating pits in the hole wall that reduce hole-copper adhesion.
Smear on thick boards and high-Tg materials is more stubborn, requiring extended desmear processing time. For boards with blind and buried vias, desmear is an especially critical process.
3. Electroless Copper Deposition: Forming the First Conductive Layer on the Insulating Hole Wall
The resin substrate of the circuit board is non-conductive, and electrolytic copper plating can only deposit metal on conductive surfaces — it cannot plate copper directly onto the insulating hole wall. Therefore, an electroless copper (PTH) process must first be used to deposit an extremely thin layer of electroless copper over the entire insulating resin surface of the hole wall.
The principle of electroless copper deposition is an oxidation-reduction chemical reaction that requires no external power supply, allowing copper ions to be reduced to metallic copper under the action of the catalyst on the hole wall. After the board is immersed sequentially in the chemical baths, the hole wall is covered with a thin conductive copper film. With this conductive base in place, subsequent electrolytic plating can proceed.
Defects in electroless copper quality most typically manifest as no copper on the hole wall and open vias. Many reliability issues cannot be detected right after production; after thermal cycling between high and low temperatures, the hole copper fractures and the product fails later in service. Electroless copper is a hidden process that is difficult to inspect with the naked eye, so factories must periodically perform cross-sectioning and metallographic analysis to control deposition quality.
4. Panel Plating: Building Up Hole-Wall Copper Thickness
The copper layer from electroless deposition is extremely thin — only a fraction of a micron — and cannot withstand current flow or soldering temperatures. After electroless copper, the board is therefore loaded onto the plating line for full-panel electrolytic copper plating.
The board serves as the cathode and is placed in a plating bath containing copper ions, with an external DC power supply connected. Under the electric field, copper ions in the solution are continuously reduced and deposited onto the surface copper foil and the conductive layer on the hole walls. As plating time increases, both the surface copper foil and the hole-wall copper layer thicken in step, until the copper thickness required by the process specification is reached.
During plating, current distribution is not uniform between the center and the edges of the board, which can easily result in excessive copper thickness at the board edges and insufficient thickness at the board center. Large plating lines use shields and adjust current parameters to improve copper thickness uniformity across the panel. Boards with insufficient hole-wall copper thickness have reduced via current-carrying capacity and are prone to via burn-out failures under high-current conditions.
5. Post-Plating Quality Inspection and Process Transition
After plating, the factory takes samples for cross-section inspection, measuring hole-wall copper thickness under a microscope and checking the hole copper for voids and cracks. Panels that pass plating inspection can then move on to the outer-layer circuit pattern fabrication process.
During design, R&D engineers should avoid specifying via diameters that are too small. The smaller the hole, the more difficult it is for the plating solution to flow through it; the copper thickness at the center of the hole is therefore more likely to be thin during plating, and production yield drops accordingly. Where conditions permit, appropriately enlarging the via diameter can improve plating yield and reduce the difficulty for the manufacturer.
Drilling — desmear — electroless copper — copper plating: these processes open up the critical pathways for electrical interconnection between layers of a multilayer PCB, and via reliability determines the long-term service life of the circuit board.
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