For PCBs with identical base materials and layer counts, adopting different manufacturing processes results in drastically different finished board capabilities. Many engineers focus solely on layer count and substrate, overlooking how process choices define capability boundaries. Designs are often finalized only to discover that trace widths, spacing, hole sizes, or copper weights exceed the fabricator’s limits—forcing costly revisions. HDI boards, heavy copper PCBs, impedance-controlled boards, and blind/buried via boards are all specialized process variants derived from standard base materials.
1. HDI (High-Density Interconnect) PCBs: The Core Process for Miniaturization
HDI boards rely on laser-drilled microvias to achieve smaller hole diameters and finer traces. Their defining feature is the use of blind and buried microvias, which do not penetrate the entire board but connect only adjacent inner layers—freeing up valuable surface routing space.
Drilling Comparison: Standard mechanical drilling typically bottoms out at 0.2 mm. HDI laser microvias can reach 0.075–0.1 mm, enabling direct fan-out of dense BGA pins without excessive outer-layer rerouting.
HDI Build-up Classes: HDI is categorized into first-order, second-order, and multi-order structures. Higher-order designs involve stacked microvias, increasing process complexity, cost, and lead time.
Clarification: HDI is not a special material—it is a manufacturing process. The substrate can still be standard FR-4 or high-frequency laminates. Multilayer boards using only through-holes are not HDI.
Pros & Cons: High wiring density enables product miniaturization. However, higher-order HDI raises costs, extends lead times, and imposes stricter requirements on materials and lamination.
Typical Applications: Smartphone mainboards, wearables, compact modules.
Selection Tip: For BGA pad pitches > 0.4 mm, standard through-hole multilayer boards are usually sufficient. Avoid over-specifying HDI unnecessarily.
2. Blind/Buried Via PCBs vs. Standard Through-Hole Multilayers
Through-Holes: Drilled from the top layer to the bottom layer, penetrating the entire board.
Buried Vias: Located entirely within the board’s inner layers, invisible from the surface.
Blind Vias: Connect an outer layer to one or more inner layers without passing through the entire board.
Standard through-hole multilayers are simple and low-cost. However, under dense BGAs, through-hole pads consume significant routing channels, creating congestion. Blind and buried vias shift interlayer connections inside the board, preserving surface routing space.
Key Considerations:
Blind/buried via designs require additional lamination cycles, raising costs and increasing the risk of board warpage.
Avoid stacked blind vias unless necessary—stacked vias are difficult to align and prone to plating voids. Staggered blind/buried vias are preferred.
3. Heavy Copper PCBs: High-Current Power Boards
Heavy copper PCBs typically feature copper weights > 2 oz (70 μm), with some high-power applications using 3 oz or 4 oz. They are essential for high-current power loops in energy storage BMS, variable-frequency drives, and industrial power supplies. Standard PCBs generally use 0.5–1 oz copper.
Trade-offs: Thicker copper increases current-carrying capacity but introduces manufacturing constraints. After etching, thick copper traces exhibit rough sidewalls, requiring wider minimum trace widths and spacing—rules that cannot simply carry over from thin-copper designs. As copper weight increases, minimum trace/space requirements increase, reducing routing density.
Lamination Challenges: Inner-layer heavy copper impedes resin flow during lamination, risking resin voids. This demands careful selection of prepreg (PP) materials.
Pros & Cons: Excellent current handling and reduced DC IR drop; however, reduced routing density and higher cost.
Selection Tip: Avoid heavy copper for signal layers. Use heavy copper only in power/ground regions while keeping signal traces at standard copper weights to balance current capacity and routing density.
4. Impedance Control PCBs: Process Assurance for High-Speed Signals
Impedance-controlled boards are manufactured to strict impedance targets for critical nets such as DDR, USB, Ethernet, and RF differential pairs. Impedance control is not a unique material—it is achieved on standard FR-4 or high-frequency laminates by precisely controlling trace width and dielectric thickness.
Process Requirements: Fabricators must tightly control dielectric thickness and trace width tolerances and perform impedance coupling tests during production, increasing cost over standard PCBs.
Common Misconception: Not every high-speed board requires full-board impedance control. Only critical high-speed differential and single-ended signals need control; low-speed power and general I/O traces do not—selective control reduces cost.
Selection Tip: In fabrication drawings, clearly specify the target impedance value and tolerance for each controlled net. Do not simply write “impedance control.”
5. Key Comparison of the Four Process Types
Design Factor | Guideline |
|---|
Component Density | For BGA pitches < 0.4 mm, evaluate HDI or blind/buried via processes. |
Current Requirements | For high continuous current or IR drop sensitivity, evaluate heavy copper. |
Signal Types | For high-speed differential or RF signals, specify impedance control. |
Form Factor | For aggressive miniaturization, HDI offers clear advantages. |
Process Cost & Lead Time | Blind/buried vias, HDI, and heavy copper all increase cost and lead time. |
Design Rule Adjustments | Increase minimum trace/space for heavy copper; mind annular ring sizes for HDI microvias. |
Testing Requirements | For impedance boards, define test coupon locations to facilitate sampling. |
6. Common Pitfalls in Process Selection
Pitfall 1: HDI for HDI’s Sake
Example: A design with a 0.5 mm BGA pitch can be fanned out using a standard 4-layer through-hole board. Specifying first-order HDI doubles cost with no real benefit.
Pitfall 2: Uniform Heavy Copper Across the Entire Board
Using heavy copper for signal traces forces wider trace widths and spacing, making routing difficult or impossible. Correct approach: heavy copper in power regions, standard copper for signal layers.
Pitfall 3: Missing Impedance Tolerances
Specifying only “100 Ω differential” without ±10% or ±5% tolerance leaves the fabricator to default to standard tolerances, which may not meet high-speed requirements.
7. DFM Considerations During Design
Finalize process selection during stack-up planning—not after layout is complete. Late additions of HDI, heavy copper, or impedance control often result in design rule violations and major rework.
Obtain and review the fabricator’s capability table. Verify minimum hole sizes, trace/space limits, and copper-weight-specific constraints. Keep all layout parameters within the process window.
Follow this principle: Do not specify special processes unless necessary. Each additional special process increases cost, extends lead time, and introduces yield risk. If a design can be realized with standard through-holes and standard copper weights, avoid HDI and heavy copper.
Summary:
HDI, blind/buried vias, heavy copper, and impedance control are all process-driven PCB variants. Prioritize standard processes whenever performance requirements allow. Only specify special processes when they deliver clear technical benefits—balancing performance, cost, and manufacturability.
Home > 
