The enclosures of 800G optical modules are compact and sealed, featuring high thermal density in DSPs and laser driver chips, coupled with strong electromagnetic radiation from high-frequency channels. Optimizing trace routing alone is insufficient to address issues such as thermal throttling and EMC test failures. Thermal management and electromagnetic compatibility must be designed in tandem, leveraging PCB structural processes to achieve dual protection against heat and electromagnetic interference. This article details three core solutions: thermal structure design, grounding and shielding systems, and power supply filtering.
I. Specifications for Layered Thermal Structure Design
Single-module peak power consumption can reach 18W; excessive local temperature rises in chips directly lead to link bit errors and accelerated device aging. A dense array of thermal vias (approx. 0.3mm diameter, 1mm pitch) filled with copper should be placed beneath high-heat components to rapidly conduct heat to inner-layer solid ground planes for dissipation. Large-area thermal copper pads are reserved under optical devices (TOSA/ROSA) to accommodate thermal pads, utilizing the enclosure for auxiliary heat dissipation. High-current power traces are widened with thicker copper plating to ensure current carrying capacity and thermal performance, preventing trace burnout. Inner-layer ground planes serve dual duty as heat spreaders, utilizing large copper pours to evenly distribute system heat and minimize overall board temperature gradients.
II. Multi-Level EMC Shielding and Grounding System
A three-tier shielding architecture is established: a continuous ground via fence along the board edge blocks edge radiation; metal shields are installed over high-speed chips and analog sampling areas, connected to the ground plane via dense ground vias for low-impedance continuity; and a via fence surrounds optical connectors to isolate internal and external port interference. The system adopts a unified single-point ground, eliminating split digital and analog ground routing. Inter-domain signals are transmitted via isolation components to prevent ground loop noise. Ground return vias are added at high-frequency layer transitions to maintain ground continuity.
III. Supporting Power Integrity and Filtering Design
800G modules exhibit extremely low tolerance for power supply noise, with peak supply noise capped at 66mV. A combination of high and low-value decoupling capacitors is placed at the power inlet and positioned close to chip power pins to minimize the power loop area. Independent power supply zones are isolated with copper pours to prevent high-power driver noise from coupling into analog sampling circuits. Filter beads are installed on low-speed control buses to suppress high-frequency noise propagation. Combined with ground plane shielding, this achieves dual noise reduction for both radiated and conducted emissions.
IV. Verification and Acceptance Criteria
During the prototype phase, temperature rise tests and EMC radiation scans must be conducted concurrently. Hotspot temperatures and frequency bands exceeding limits should be identified to optimize via density and component placement.
Within confined enclosures, thermal and EMC issues are deeply intertwined: excessive heat exacerbates dielectric parameter drift and impedance fluctuations, while radiation interference degrades signal integrity. The integration of layered thermal structures with a three-tier shielding and grounding system effectively resolves these two core challenges simultaneously.