Drawing a PCB isn't hard to get into, but it’s incredibly easy to make mistakes. Many people feel like they’ve mastered board design once they can import a schematic and generate Gerber files. But then the boards come back from fabrication—some whistling with noise, others suffering from interference, and the worst cases burning out components as soon as power is applied.
Looking back, most problems stem from basic errors. These aren't difficult concepts to understand, yet they are easily overlooked. Here are ten common mistakes—see how many you've made.
1. Not Configuring DRC Rules Before Routing
Many beginners open the software and start routing immediately, leaving the Design Rule Check (DRC) settings at their defaults. The default rules are meant for the simplest boards; they simply can't handle more complex designs. If the trace width is insufficient, the board won't handle the current. If the clearance is too narrow, the manufacturer might not even be able to produce it. Oversized vias waste valuable routing space.
The correct approach is to calculate trace widths based on board thickness, copper weight, and current requirements beforerouting. Set minimum clearances and line widths according to manufacturing capabilities. DRC is your safety net; if you don't set the baseline, problems are inevitable.
2. Using Right Angles and Acute Angles in Traces
This is probably the most classic rookie mistake. Right-angle traces cause sudden changes in width at the corners, leading to impedance discontinuities when high-speed signals pass through, which causes signal reflection. Acute angles are even worse; besides impedance issues, the "acid trap" effect can lead to over-etching during manufacturing, reducing yield rates.
Just stick to 45-degree angles or arc transitions. It sounds simple, but when routing density increases and deadlines loom, it's easy to lazily snap a trace to a 90-degree angle. After routing, do a global search for right angles using your software’s check function—don't rely on your eyes.
3. Decoupling Capacitors Placed Miles Away from Pins
The job of a decoupling capacitor is to provide transient current to an IC; the closer, the better. However, many beginners place decoupling caps in a neat ring around the IC, while the actual traces take a long detour to connect. This drastically increases equivalent inductance, rendering the capacitor useless.
In my experience, the further the decoupling capacitor is from the pin, the worse the high-frequency decoupling effect. Within 5mm is barely acceptable; beyond 10mm, it’s basically a placeholder. Some beginners place all capacitors uniformly along the edge of the board for aesthetics, completely negating their purpose. Place them right next to the pins, use short and thick traces, and put vias right next to the pads.
4. Fragmenting the Ground Plane
The ground plane is one of the most valuable resources on a PCB. A complete ground plane provides the lowest impedance return path, which is crucial for EMC and signal integrity. Beginners often don't care during routing, running signal traces and vias wherever they want, slicing the ground plane into isolated islands.
Once the ground plane is fragmented, the return path has to take a detour. That loop area acts as an antenna—causing excessive radiation, emissions failures, and increased crosstalk. Don't route over the ground plane unless necessary; if you must, ensure you don't turn the plane into islands.
5. Critical Signals Crossing Split Planes
This is closely related to the previous point. When a high-speed signal line passes over a gap or crack in the ground plane, the return current is forced to detour, creating a large signal loop. This loop not only radiates interference but also readily picks up external noise.
For clock signals, differential pairs, and high-speed buses, ensure the reference plane directly underneath is continuous. If you absolutely cannot avoid a split, either reroute the trace or place a stitching capacitor across the gap to provide a return path.
6. Ignoring Length Matching for High-Speed Signals
High-speed interfaces like DDR, PCIe, and USB 3.0 have strict requirements for timing consistency. If there is a significant length mismatch within a differential pair or a bus group, signals arrive at different times. This eats up timing margins, leading to higher bit error rates or outright communication failure.
Length matching isn't just about randomly adding serpentine traces. The spacing, amplitude, and coupling length of those serpentines matter. Spacing that is too tight introduces crosstalk; too wide wastes space. Specific parameters depend on signal rates and protocol requirements—don't just guess.
7. Power Traces Too Thin for the Current
Under 1oz copper thickness, a 1mm trace width can roughly handle 1A of current—a figure many beginners don't grasp. They draw power lines as thin as signal lines. Once powered on, the trace turns into a heating element—at best causing a voltage drop that starves chips, and at worst burning the copper trace open.
Power trace width must be calculated based on actual current, with ample margin. Use thick traces or copper pours for high-current paths. If necessary, add thermal relief pads and via arrays to help with heat dissipation and current distribution.
8. Silkscreen Covering Pads
Silkscreen covering pads seems minor, but it has a major impact. Ink on pads reduces solderability, leading to poor soldering or cold joints. Some manufacturers will delete silkscreen on pads before production, but not all do.
Check for overlap between the silkscreen layer and the pad layer before generating Gerbers. Most EDA tools have this check built-in. Make it a habit; don't leave these low-level issues for the manufacturer to clean up.
9. Vias Placed Directly on Pads
Placing vias directly on pads during BGA fanout is sometimes done on extremely dense boards, but beginners usually do it out of laziness. Vias on pads cause solder to wick away into the hole, resulting in insufficient solder—a near-certain failure in wave soldering processes.
If you must place a via in a pad, use resin-filled and capped vias, which adds extra manufacturing cost. Unless necessary, always place vias adjacent to pads and connect them with short traces.
10. No Test Points on the Board
The board is finished, all signals have connections, and everything looks fine. Then comes debugging time, and you realize you want to probe a critical signal, but there’s nowhere to put the probe—the pad is too small, surrounded by components, or you have to resort to flying wires.
Test points are not optional decorations. Key power nodes, clock signals, reset signals, and debug interfaces should have test pads or test vias reserved during the layout phase. Adding a few test points costs nothing but saves hours of debugging time later. A board without test points will make you question your life choices during debugging.
Stepping on Mines Isn't Scary; Stepping on Them Repeatedly Is
Almost everyone who draws boards has made at least half of these ten mistakes. The difference is that some people learn after making a mistake once, while others repeat the same errors on every single board. In PCB design, experience is valuable because the mistakes aren't wasted—provided you know where the holes are.
If you frequently encounter similar issues while drawing boards or want to systematically improve your PCB design skills, feel free to reach out. I can help you map out a learning path.
Home > 
